(1) Field of the Invention
The invention relates to programmable devices and, more particularly, to rapidly programming programmable devices.
(2) Description of the Related Art
In high performance circuit cards, memory devices (e.g., flash memory devices), such as those used to store boot loads, are often installed unprogrammed into a circuit card and then programmed later using resources on the card such as special development processor ports or boundary scan circuitry. This is done because device packages used in such circuit card applications do not lend themselves to be easily socketed, and therefore off-board programming is difficult. Of these two methods of memory device programming, namely programming via special processor ports and programming via boundary scan circuitry, using boundary scan circuitry is more convenient based on the greater availability of commercially available tools and services for this method compared to using processor development ports.
Certain tools that use boundary scan for programming, particularly FIRECRON's flash boundary scan programming software, can significantly reduce flash programming time. However, FIRECRON's software requires the use of four additional I/O pins on the programmable logic device to create a second test access port (TAP) and additional circuits on the circuit card to support the port. Since it is desirable in high performance circuit cards to achieve the most efficient use of space for cost and performance reasons, a technique for achieving reduced flash programming times without the need of a second TAP and supporting circuitry is desired.
The use of the same reference symbols in different drawings indicates similar or identical items.